diff options
| author | Ariel D'Alessandro <ariel@vanguardiasur.com.ar> | 2015-09-17 18:15:37 +0200 |
|---|---|---|
| committer | Joachim Eastwood <manabian@gmail.com> | 2015-09-30 22:48:58 +0200 |
| commit | b8da65d1088e71466eb80181d307f2fb2b36eb58 (patch) | |
| tree | ecc4bfe6698a99c82db4747e86aba9f10b51aad6 /arch/arm/boot/dts/lpc18xx.dtsi | |
| parent | 9c8a5cdcee682013c4e69b5354e4f4e3acf30487 (diff) | |
ARM: dts: lpc18xx: add sct pwm node
NXP LPC SoCs family, which includes LPC18xx/LPC43xx, provides a State
Configurable Timer (SCT) which can be configured as a Pulse Width
Modulator.
Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar>
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/lpc18xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/lpc18xx.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi index 4ea82536a8a0..19c6f2951129 100644 --- a/arch/arm/boot/dts/lpc18xx.dtsi +++ b/arch/arm/boot/dts/lpc18xx.dtsi @@ -68,6 +68,16 @@ }; soc { + sct_pwm: pwm@40000000 { + compatible = "nxp,lpc1850-sct-pwm"; + reg = <0x40000000 0x1000>; + clocks =<&ccu1 CLK_CPU_SCT>; + clock-names = "pwm"; + resets = <&rgu 37>; + #pwm-cells = <3>; + status = "disabled"; + }; + dmac: dma-controller@40002000 { compatible = "arm,pl080", "arm,primecell"; arm,primecell-periphid = <0x00041080>; |