diff options
| author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-11-24 17:17:24 +0800 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2014-12-29 19:22:12 +0800 |
| commit | 4fe6be0fe0c8bec2fdeafe11e7202679cd68e0b2 (patch) | |
| tree | d10ab2aa9288d294bf5a9e11f435a11e7cc123df /arch/arm/boot/dts/ls1021a.dtsi | |
| parent | 97bf6af1f928216fd6c5a66e8a57bfa95a659672 (diff) | |
ARM: ls1021a: dtsi: add 'big-endian' property for scfg node
On LS1021A SoC, the scfg device is in BE mode.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ls1021a.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 657da14cb4b5..c70bb27ac65a 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -142,6 +142,7 @@ scfg: scfg@1570000 { compatible = "fsl,ls1021a-scfg", "syscon"; reg = <0x0 0x1570000 0x0 0x10000>; + big-endian; }; clockgen: clocking@1ee1000 { |