diff options
| author | Viresh Kumar <viresh.kumar@linaro.org> | 2018-05-25 16:01:49 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-10-03 17:00:52 -0700 |
| commit | 69cb15d6596de0e91877b19af8353a4f0192e971 (patch) | |
| tree | 2cb63195418dcd882e907944eb93aeaab5bcc3c8 /arch/arm/boot/dts/mt7623.dtsi | |
| parent | 5ef7a3782de84729d021a702341e33cccd06f32c (diff) | |
arm: dts: mediatek: Add missing cooling device properties for CPUs
[ Upstream commit 0c7f7a5150023f3c6f0b27c4d4940ce3dfaf62cc ]
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/boot/dts/mt7623.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/mt7623.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index 185357323572..028cf4a5887f 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -98,6 +98,7 @@ compatible = "arm,cortex-a7"; reg = <0x1>; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; clock-frequency = <1300000000>; }; @@ -106,6 +107,7 @@ compatible = "arm,cortex-a7"; reg = <0x2>; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; clock-frequency = <1300000000>; }; @@ -114,6 +116,7 @@ compatible = "arm,cortex-a7"; reg = <0x3>; operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; clock-frequency = <1300000000>; }; }; |