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authorKumar Gala <galak@codeaurora.org>2014-05-28 12:12:40 -0500
committerKumar Gala <galak@codeaurora.org>2014-05-29 10:35:04 -0500
commit66a6c3175f582479f34c77e376b5c3a13129450b (patch)
treee2c4b01eaaca7a6c9fb2381a46bfbb13993cc23e /arch/arm/boot/dts/qcom-msm8660-surf.dts
parent665c9c03f6405bdec6e9629d9dfa795c2124a5a2 (diff)
ARM: dts: qcom: Update msm8660 device trees
* Move SoC peripherals into an SoC container node * Move serial enabling into board file (qcom-msm8660-surf.dts) * Cleanup cpu node to match binding spec, enable-method and compatible should be per cpu, not part of the container * Add GSBI node and configuration of GSBI controller Signed-off-by: Kumar Gala <galak@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8660-surf.dts')
-rw-r--r--arch/arm/boot/dts/qcom-msm8660-surf.dts10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts
index 169bad90dac9..45180adfadf1 100644
--- a/arch/arm/boot/dts/qcom-msm8660-surf.dts
+++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts
@@ -3,4 +3,14 @@
/ {
model = "Qualcomm MSM8660 SURF";
compatible = "qcom,msm8660-surf", "qcom,msm8660";
+
+ soc {
+ gsbi@19c00000 {
+ status = "ok";
+ qcom,mode = <GSBI_PROT_I2C_UART>;
+ serial@19c40000 {
+ status = "ok";
+ };
+ };
+ };
};