diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2016-06-17 22:28:09 +0200 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2016-06-27 17:36:57 -0500 |
| commit | c51cb1a15676daed1d1a7fc8a0f2d1e3ae125361 (patch) | |
| tree | f15159de0a2d55a0c03e227d0f70157b7fb41115 /arch/arm/boot/dts/qcom-msm8660.dtsi | |
| parent | 30b4fb1cc40a0ee35f84e2431cadfe9ced40076a (diff) | |
ARM: dts: add I2C block in GSBI12
The I2C block on the GSBI12 is used on the APQ8060 Dragonboard for
sensors. Make it available in the chipset file.
Take this opportunity to fix the IRQ flag "0" to "NONE" using the
IRQ DT include.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8660.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-msm8660.dtsi | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index e7c6e2942f47..8ee3045f4066 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -122,11 +122,22 @@ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; reg = <0x19c40000 0x1000>, <0x19c00000 0x1000>; - interrupts = <0 195 0x0>; + interrupts = <0 195 IRQ_TYPE_NONE>; clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>; clock-names = "core", "iface"; status = "disabled"; }; + + gsbi12_i2c: i2c@19c80000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x19c80000 0x1000>; + interrupts = <0 196 IRQ_TYPE_NONE>; + clocks = <&gcc GSBI12_QUP_CLK>, <&gcc GSBI12_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; qcom,ssbi@500000 { |