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authorChris Brandt <chris.brandt@renesas.com>2017-03-29 10:30:33 -0700
committerSimon Horman <horms+renesas@verge.net.au>2017-04-04 12:58:37 -0400
commit3b5e3f0455442f376f91c69147526535a0389ac3 (patch)
tree88db720dc1271f4d22081de081876d0ed3f8889c /arch/arm/boot/dts/r7s72100.dtsi
parentdeddcb891d0d2b4f437dea9bdea4752982c4b133 (diff)
ARM: dts: r7s72100: add rtc to device tree
Add the realtime clock device node. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100.dtsi')
-rw-r--r--arch/arm/boot/dts/r7s72100.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 9db46ac08ba7..ab9ced453118 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -563,4 +563,18 @@
power-domains = <&cpg_clocks>;
status = "disabled";
};
+
+ rtc: rtc@fcff1000 {
+ compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
+ reg = <0xfcff1000 0x2e>;
+ interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 277 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "alarm", "period", "carry";
+ clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
+ <&rtc_x3_clk>, <&extal_clk>;
+ clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
+ power-domains = <&cpg_clocks>;
+ status = "disabled";
+ };
};