diff options
| author | Chris Brandt <chris.brandt@renesas.com> | 2016-09-22 17:32:09 -0400 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-11-04 10:36:17 +0100 |
| commit | 7c8522b7047c77ef598e8b5f9ff6e349c22e0622 (patch) | |
| tree | 9016cef7933af11f1702dee05f72e573235589f5 /arch/arm/boot/dts/r7s72100.dtsi | |
| parent | 887862227ba397bc6b22147284cdccc60a87f72f (diff) | |
ARM: dts: r7s72100: add sdhi clock to device tree
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r7s72100.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 50f9f3bc109d..eab06701ef11 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -149,6 +149,14 @@ >; clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4"; }; + mstp12_clks: mstp12_clks@fcfe0444 { + #clock-cells = <1>; + compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xfcfe0444 4>; + clocks = <&p1_clk>, <&p1_clk>; + clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>; + clock-output-names = "sdhi1", "sdhi0"; + }; }; cpus { |