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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-07-04 17:23:12 +0200
committerSimon Horman <horms+renesas@verge.net.au>2017-07-27 16:28:34 +0200
commit06278baa1b08f2b2ae26d5b2394b779ed82f3dfa (patch)
tree2a6c0cd739ed1fd30fcd3e725ad8162143fae3a1 /arch/arm/boot/dts/r8a7743.dtsi
parent9e70afe39eeb33488f0d18131b023b92c1493db8 (diff)
ARM: dts: r8a7743: Add Inter Connect RAM
RZ/G1M has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7743.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7743.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 0c73fa8047b9..2cdb9a7115af 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -593,6 +593,21 @@
status = "disabled";
};
+ icram2: sram@e6300000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe6300000 0 0x40000>;
+ };
+
+ icram0: sram@e63a0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63a0000 0 0x12000>;
+ };
+
+ icram1: sram@e63c0000 {
+ compatible = "mmio-sram";
+ reg = <0 0xe63c0000 0 0x1000>;
+ };
+
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7743";
reg = <0 0xee700000 0 0x400>;