diff options
| author | Fabrizio Castro <fabrizio.castro@bp.renesas.com> | 2017-11-07 15:10:45 +0000 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-11-27 11:40:15 +0100 |
| commit | 805a5263f4212e431a44c4a04738022a2498f652 (patch) | |
| tree | e8ff098df58c59fb25b93ca89b6cb42eee48189d /arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | |
| parent | 85d3122659be310c632ef1908532157ce82900ee (diff) | |
ARM: dts: iwg22d-sodimm: Add can0 support to carrier board
This patch enables CAN0 interface exposed through connector J15 on the
carrier board.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts')
| -rw-r--r-- | arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts index 80c82aa94c06..39ce7e7101c7 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts +++ b/arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts @@ -59,6 +59,13 @@ }; }; +&can0 { + pinctrl-0 = <&can0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &hscif1 { pinctrl-0 = <&hscif1_pins>; pinctrl-names = "default"; @@ -85,6 +92,11 @@ function = "avb"; }; + can0_pins: can0 { + groups = "can0_data"; + function = "can0"; + }; + hscif1_pins: hscif1 { groups = "hscif1_data", "hscif1_ctrl"; function = "hscif1"; |