diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-07-04 17:23:13 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-07-27 16:28:34 +0200 |
| commit | 825216b8160b53b83f405a1e7b6c647e4e99e25a (patch) | |
| tree | bdbc7ae822f8dc3c6ac7fc354a6aeb2c4fc84059 /arch/arm/boot/dts/r8a7745.dtsi | |
| parent | 06278baa1b08f2b2ae26d5b2394b779ed82f3dfa (diff) | |
ARM: dts: r8a7745: Add Inter Connect RAM
RZ/G1E has 3 regions of Inter Connect RAM (72 + 4 + 256 KiB).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7745.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7745.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi index 2feb0084bb3b..88cf92bcd2f9 100644 --- a/arch/arm/boot/dts/r8a7745.dtsi +++ b/arch/arm/boot/dts/r8a7745.dtsi @@ -468,6 +468,21 @@ status = "disabled"; }; + icram2: sram@e6300000 { + compatible = "mmio-sram"; + reg = <0 0xe6300000 0 0x40000>; + }; + + icram0: sram@e63a0000 { + compatible = "mmio-sram"; + reg = <0 0xe63a0000 0 0x12000>; + }; + + icram1: sram@e63c0000 { + compatible = "mmio-sram"; + reg = <0 0xe63c0000 0 0x1000>; + }; + ether: ethernet@ee700000 { compatible = "renesas,ether-r8a7745"; reg = <0 0xee700000 0 0x400>; |