diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2015-02-26 11:21:22 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2015-02-27 10:00:17 +0900 |
| commit | 26c00ab4aae2d29b6c724a9c23d5f6cba2b20e41 (patch) | |
| tree | a58e052fbef3595ba77d8a3676e738478730e126 /arch/arm/boot/dts/r8a7790-lager.dts | |
| parent | cd21cb46e14aae3a5d4f044c07f2c1f9d89fcd1a (diff) | |
ARM: shmobile: lager: Add DU external pixel clocks to DT
Declare the fixed 148.5MHz pixel clocks connected to the DU clock
inputs.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790-lager.dts')
| -rw-r--r-- | arch/arm/boot/dts/r8a7790-lager.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 631b3f5fb7d8..329bb994aac0 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -233,6 +233,18 @@ }; }; }; + + x2_clk: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + x13_clk: x13-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; }; &du { @@ -240,6 +252,15 @@ pinctrl-names = "default"; status = "okay"; + clocks = <&mstp7_clks R8A7790_CLK_DU0>, + <&mstp7_clks R8A7790_CLK_DU1>, + <&mstp7_clks R8A7790_CLK_DU2>, + <&mstp7_clks R8A7790_CLK_LVDS0>, + <&mstp7_clks R8A7790_CLK_LVDS1>, + <&x13_clk>, <&x2_clk>; + clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1", + "dclkin.0", "dclkin.1"; + ports { port@0 { endpoint { |