summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/r8a7790-lager.dts
diff options
context:
space:
mode:
authorSimon Horman <horms+renesas@verge.net.au>2014-09-03 09:49:01 +0900
committerSimon Horman <horms+renesas@verge.net.au>2014-09-04 10:10:21 +0900
commit126f998e4ae8bc45cd72c7e62c53767c007fc319 (patch)
tree5bfb25834ae585a89bec3a3eb90a93e34531fcfd /arch/arm/boot/dts/r8a7790-lager.dts
parent40c488df84f9fbf4b84b4baed6e2cec4a2d946ed (diff)
ARM: shmobile: lager: correct memory map
The base address of the second memory region on the lager board is 0x140000000. Update the tag used in the dts file accordingly. This is a documentation fix and should have no run-time affect. This problem was introduced when the second memory region was added to the lager dts file by 62bc32a2573c4219 ("ARM: shmobile: Include all 4 GiB of memory on Lager)" in v3.14. Reported-by: NAOYA SHIIBA <naoya.shiiba.nx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790-lager.dts')
-rw-r--r--arch/arm/boot/dts/r8a7790-lager.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index b5f56bcc8ae1..f467c6d13e3b 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -32,7 +32,7 @@
reg = <0 0x40000000 0 0x40000000>;
};
- memory@180000000 {
+ memory@140000000 {
device_type = "memory";
reg = <1 0x40000000 0 0xc0000000>;
};