diff options
| author | Kouei Abe <kouei.abe.cp@renesas.com> | 2014-10-14 16:01:41 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2014-10-30 09:56:27 +0900 |
| commit | e4d2fd9eb43d12e9b6a7ab842bf6986b4dd75a1d (patch) | |
| tree | e2ee4762607444851f8a685ed55cf99bad4b9881 /arch/arm/boot/dts/r8a7791.dtsi | |
| parent | 2284ff5f3f7d58e33812f4387c2ac8a09428e4cf (diff) | |
ARM: shmobile: r8a7791: Add SGX clock to device tree
Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7791.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 1c58ce0a488a..98c1b8bef61f 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1,7 +1,7 @@ /* * Device Tree Source for the r8a7791 SoC * - * Copyright (C) 2013 Renesas Electronics Corporation + * Copyright (C) 2013-2014 Renesas Electronics Corporation * Copyright (C) 2013-2014 Renesas Solutions Corp. * Copyright (C) 2014 Cogent Embedded Inc. * @@ -977,17 +977,18 @@ mstp1_clks: mstp1_clks@e6150134 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; - clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, + clocks = <&m2_clk>, <&p_clk>, <&zg_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; renesas,clock-indices = < - R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 + R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_3DG + R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S >; clock-output-names = - "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", - "vsp1-du0", "vsp1-sy"; + "jpu", "tmu1", "3dg", "tmu3", "tmu2", "cmt0", "tmu0", + "vsp1-du1", "vsp1-du0", "vsp1-sy"; }; mstp2_clks: mstp2_clks@e6150138 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |