diff options
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2016-09-03 01:07:28 +0300 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-09-05 14:32:43 +0200 |
| commit | 4719d8f9356a9ea8287ebdac04d759482524e67c (patch) | |
| tree | b9712b2c15a80709692ca5f84224ca0fe2738735 /arch/arm/boot/dts/r8a7792.dtsi | |
| parent | 0c157ad23bb02fbda8b9cee82941d7c5ecac26f1 (diff) | |
ARM: dts: r8a7792: add QSPI clock
Describe the QSPI clock in the R8A7792 device tree.
Based on the original (and large) patch by Vladimir Barinov
<vladimir.barinov@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7792.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7792.dtsi | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi index ff47755fb01e..6ff3e365d56a 100644 --- a/arch/arm/boot/dts/r8a7792.dtsi +++ b/arch/arm/boot/dts/r8a7792.dtsi @@ -860,6 +860,7 @@ clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&p_clk>, <&p_clk>, + <&cpg_clocks R8A7792_CLK_QSPI>, <&cp_clk>, <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; @@ -870,6 +871,7 @@ R8A7792_CLK_GPIO1 R8A7792_CLK_GPIO0 R8A7792_CLK_GPIO11 R8A7792_CLK_GPIO10 R8A7792_CLK_CAN1 R8A7792_CLK_CAN0 + R8A7792_CLK_QSPI_MOD R8A7792_CLK_GPIO9 R8A7792_CLK_GPIO8 R8A7792_CLK_I2C5 R8A7792_CLK_I2C4 R8A7792_CLK_I2C3 R8A7792_CLK_I2C2 @@ -879,8 +881,9 @@ "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", "gpio11", "gpio10", "can1", "can0", - "gpio9", "gpio8", "i2c5", "i2c4", - "i2c3", "i2c2", "i2c1", "i2c0"; + "qspi_mod", "gpio9", "gpio8", + "i2c5", "i2c4", "i2c3", "i2c2", + "i2c1", "i2c0"; }; }; |