diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-10-12 11:35:14 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-10-16 11:43:06 +0200 |
| commit | f359fd3bba71176a122939fe3db9c7f20000d3f0 (patch) | |
| tree | dc9a953580877df7329ff58383869d7e05091815 /arch/arm/boot/dts/r8a7793.dtsi | |
| parent | 8684a24caa3d59d9ba03f1e6f9653b49ac78ec04 (diff) | |
ARM: dts: r8a7793: Add missing clock for secondary CA15 CPU core
Currently only the primary CPU in the CA15 cluster has a clocks
property, while the secondary CPU core is driven by the same clock.
Add the missing clocks property to fix this.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7793.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/r8a7793.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 76418c375a10..58eae569b4e0 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi @@ -62,6 +62,7 @@ compatible = "arm,cortex-a15"; reg = <1>; clock-frequency = <1500000000>; + clocks = <&cpg CPG_CORE R8A7793_CLK_Z>; power-domains = <&sysc R8A7793_PD_CA15_CPU1>; }; |