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authorGeert Uytterhoeven <geert+renesas@glider.be>2016-09-19 16:18:56 +0200
committerSimon Horman <horms+renesas@verge.net.au>2016-11-04 10:36:07 +0100
commit655ea555064251e0b094848d378d4a67e8ebb0ed (patch)
tree3da9d1ce03a81406946355bc4ed9a4d0c132ac06 /arch/arm/boot/dts/r8a7794.dtsi
parent88b8596ba95599fefa5a5f1a709c70796a0e8163 (diff)
ARM: dts: r8a7794: Correct SCIFB reg properties to cover all registers
Several SCIFB registers reside outside the reported register ranges. Fortunately this works (on Linux), due to the PAGE_SIZE granularity of ioremap(). Extend the sizes from 64 to 0x100 bytes to fix this, like is done on SH/R-Mobile SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7794.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7794.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 57e0d27cb82e..8cfc1385f58a 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -411,7 +411,7 @@
scifb0: serial@e6c20000 {
compatible = "renesas,scifb-r8a7794",
"renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c20000 0 64>;
+ reg = <0 0xe6c20000 0 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFB0>;
clock-names = "fck";
@@ -425,7 +425,7 @@
scifb1: serial@e6c30000 {
compatible = "renesas,scifb-r8a7794",
"renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6c30000 0 64>;
+ reg = <0 0xe6c30000 0 0x100>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFB1>;
clock-names = "fck";
@@ -439,7 +439,7 @@
scifb2: serial@e6ce0000 {
compatible = "renesas,scifb-r8a7794",
"renesas,rcar-gen2-scifb", "renesas,scifb";
- reg = <0 0xe6ce0000 0 64>;
+ reg = <0 0xe6ce0000 0 0x100>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp2_clks R8A7794_CLK_SCIFB2>;
clock-names = "fck";