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authorAndy Yan <andy.yan@rock-chips.com>2016-10-22 20:54:55 +0800
committerHeiko Stuebner <heiko@sntech.de>2017-01-02 14:25:19 +0100
commite9e79d5395b2e60a03811073e0aedfbd7fa0bc57 (patch)
tree66bd0f9c70966329417d60723549c8b894b7b596 /arch/arm/boot/dts/rk3288-veyron.dtsi
parent0af13f7063a6ffc94c905ffc8c5f324f91e5843a (diff)
ARM: dts: rockchip: use pin constants to describe gpios
Use macros to describe gpios will make the dts easier to read and write. All the modifications done with sed: sed -i -e 's/ 0 GPIO_ACTIVE_/ RK_PA0 GPIO_ACTIVE_/' arch/arm/boot/dts/rk* sed -i -e 's/ 1 GPIO_ACTIVE_/ RK_PA1 GPIO_ACTIVE_/' arch/arm/boot/dts/rk* sed -i -e 's/ 2 GPIO_ACTIVE_/ RK_PA2 GPIO_ACTIVE_/' arch/arm/boot/dts/rk* ....... ....... sed -i -e 's/ 30 GPIO_ACTIVE_/ RK_PD6 GPIO_ACTIVE_/' arch/arm/boot/dts/rk* sed -i -e 's/ 31 GPIO_ACTIVE_/ RK_PD7 GPIO_ACTIVE_/' arch/arm/boot/dts/rk* Tested with: for i in dts-old/*dtb; do scripts/dtc/dtx_diff $i dts-new/$(basename $i); done Signed-off-by: Andy Yan <andy.yan@rock-chips.com> [also adapted the gpio interrupts] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-veyron.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3288-veyron.dtsi10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 2251d28e9d2a..5d1eb0a25827 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -61,7 +61,7 @@
pinctrl-0 = <&pwr_key_l>;
power {
label = "Power";
- gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <100>;
wakeup-source;
@@ -70,7 +70,7 @@
gpio-restart {
compatible = "gpio-restart";
- gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ap_warm_reset_h>;
priority = <200>;
@@ -80,7 +80,7 @@
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
- reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
};
sdio_pwrseq: sdio-pwrseq {
@@ -96,7 +96,7 @@
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
- reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
};
vcc_5v: vcc-5v {
@@ -178,7 +178,7 @@
reg = <0x1b>;
clock-output-names = "xin32k", "wifibt_32kin";
interrupt-parent = <&gpio0>;
- interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;