diff options
| author | John Keeping <john@metanate.com> | 2016-02-23 13:40:59 +0000 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-03-27 00:54:13 +0100 |
| commit | 5415ba40650900f7d663a4b79f346c45dddd4ce0 (patch) | |
| tree | d076fb837ad58ea298a5eb1ca3e5a08176fbe890 /arch/arm/boot/dts/rk3288.dtsi | |
| parent | cef0abefa146877019e63c4e6ae439d40d01804f (diff) | |
ARM: dts: rockchip: fix MIPI interrupt on rk3288
This isn't currently used by the driver but the correct value is 19
since DSIHOST0 is 51 in the TRM and the GIC offset requires 32 to be
subtracted.
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 31f7e20ef418..872ccf01d509 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -878,7 +878,7 @@ mipi_dsi: mipi@ff960000 { compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"; reg = <0xff960000 0x4000>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>; clock-names = "ref", "pclk"; rockchip,grf = <&grf>; |