diff options
| author | ZhengShunQian <zhengsq@rock-chips.com> | 2015-08-11 18:13:44 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2015-12-12 20:15:23 +0100 |
| commit | 8818555964eed0010044c4d85f096452b14eb8b5 (patch) | |
| tree | b9a0d269146b4da25399fbfb2210db1efae1cf3e /arch/arm/boot/dts/rk3288.dtsi | |
| parent | 67e044a510d0e00656ae2ab4f0ee30971a2f40e7 (diff) | |
ARM: dts: rockchip: add eFuse config of rk3288 SoC
This patch add the eFuse dt config of rk3288 SoC.
Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index c4e085bba762..6fb0e1764594 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -899,6 +899,19 @@ interrupts = <GIC_PPI 9 0xf04>; }; + efuse: efuse@ffb40000 { + compatible = "rockchip,rockchip-efuse"; + reg = <0xffb40000 0x20>; + #address-cells = <1>; + #size-cells = <1>; + clocks = <&cru PCLK_EFUSE256>; + clock-names = "pclk_efuse"; + + cpu_leakage: cpu_leakage@17 { + reg = <0x17 0x1>; + }; + }; + usbphy: phy { compatible = "rockchip,rk3288-usb-phy"; rockchip,grf = <&grf>; |