Merge tag 'v3.18-rockchip-dts2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "second bunch of dts changes for 3.18" from Heiko Stubner:

More peripheral support for Rockchip SoCs
- dwc2 usb controllers
- spi controllers
- emmc controller

* tag 'v3.18-rockchip-dts2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Remove "regulator-always-on" in vcc_rmii for Radxa Rock
  ARM: dts: rockchip: fix rk3188 emmc pull references
  ARM: dts: rockchip: fix swapped Radxa Rock pinctrl references
  ARM: dts: rockchip: clean up rk3xxx mmc nodes
  ARM: dts: rockchip: add emmc nodes for rk3066 and rk3188
  ARM: dts: rockchip: add Cortex-A9 SPI controller nodes
  ARM: dts: rockchip: enable usb ports on Radxa Rock
  ARM: dts: rockchip: add dwc2 controllers for rk3066 and rk3188
  ARM: dts: rockchip: remove rockchip,bus-index from rk3xxx i2c0
  ARM: dts: Switch i2c0 to 400kHz on rk3288-evb-rk808
  ARM: dts: Add rk808 PMIC to rk3288-evb-rk808
  ARM: dts: Add mshc aliases for rk3288
  ARM: dts: Add SPI nodes to rk3288
  ARM: dts: Enable USB host1(dwc) on rk3288-evb
  ARM: dts: add rk3288 dwc2 controller support
  ARM: dts: Add sdio0 and sdio1 to the rk3288

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 56 insertions, 5 deletions

diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index bdc92a42def8..7332d12eb565 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -26,6 +26,11 @@
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
+		mshc0 = &emmc;
+		mshc1 = &mmc0;
+		mshc2 = &mmc1;
+		spi0 = &spi0;
+		spi1 = &spi1;
 	};
 
 	amba {
@@ -129,12 +134,28 @@
 		status = "disabled";
 	};
 
+	usb_otg: usb@10180000 {
+		compatible = "rockchip,rk3066-usb", "snps,dwc2";
+		reg = <0x10180000 0x40000>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG0>;
+		clock-names = "otg";
+		status = "disabled";
+	};
+
+	usb_host: usb@101c0000 {
+		compatible = "snps,dwc2";
+		reg = <0x101c0000 0x40000>;
+		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_OTG1>;
+		clock-names = "otg";
+		status = "disabled";
+	};
+
 	mmc0: dwmmc@10214000 {
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10214000 0x1000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-		#address-cells = <1>;
-		#size-cells = <0>;
 
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
 		clock-names = "biu", "ciu";
@@ -146,8 +167,6 @@
 		compatible = "rockchip,rk2928-dw-mshc";
 		reg = <0x10218000 0x1000>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
-		#address-cells = <1>;
-		#size-cells = <0>;
 
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>;
 		clock-names = "biu", "ciu";
@@ -155,6 +174,17 @@
 		status = "disabled";
 	};
 
+	emmc: dwmmc@1021c000 {
+		compatible = "rockchip,rk2928-dw-mshc";
+		reg = <0x1021c000 0x1000>;
+		interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
+		clock-names = "biu", "ciu";
+
+		status = "disabled";
+	};
+
 	pmu: pmu@20004000 {
 		compatible = "rockchip,rk3066-pmu", "syscon";
 		reg = <0x20004000 0x100>;
@@ -173,7 +203,6 @@
 		#size-cells = <0>;
 
 		rockchip,grf = <&grf>;
-		rockchip,bus-index = <0>;
 
 		clock-names = "i2c";
 		clocks = <&cru PCLK_I2C0>;
@@ -312,4 +341,26 @@
 		clock-names = "saradc", "apb_pclk";
 		status = "disabled";
 	};
+
+	spi0: spi@20070000 {
+		compatible = "rockchip,rk3066-spi";
+		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
+		clock-names = "spiclk", "apb_pclk";
+		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x20070000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	spi1: spi@20074000 {
+		compatible = "rockchip,rk3066-spi";
+		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
+		clock-names = "spiclk", "apb_pclk";
+		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x20074000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
 };