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authorRomain Izard <romain.izard.pro@gmail.com>2018-11-20 17:57:37 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2018-12-17 09:28:50 +0100
commitb254f11cc9304b757357460643003ea7087e6c5c (patch)
treee7e081318804f3154786999fa5dac5559e1de081 /arch/arm/boot/dts/sama5d2.dtsi
parent5ce4164fff6735d7f26b3e465deb7133cea558e9 (diff)
ARM: dts: at91: sama5d2: use the divided clock for SMC
[ Upstream commit 4ab7ca092c3c7ac8b16aa28eba723a8868f82f14 ] The SAMA5D2 is different from SAMA5D3 and SAMA5D4, as there are two different clocks for the peripherals in the SoC. The Static Memory controller is connected to the divided master clock. Unfortunately, the device tree does not correctly show this and uses the master clock directly. This clock is then used by the code for the NAND controller to calculate the timings for the controller, and we end up with slow NAND Flash access. Fix the device tree, and the performance of Flash access is improved. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/sama5d2.dtsi')
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index b1a26b42d190..a8e4b89097d9 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -308,7 +308,7 @@
0x1 0x0 0x60000000 0x10000000
0x2 0x0 0x70000000 0x10000000
0x3 0x0 0x80000000 0x10000000>;
- clocks = <&mck>;
+ clocks = <&h32ck>;
status = "disabled";
nand_controller: nand-controller {