diff options
| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-04-10 15:40:42 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-05-11 13:14:59 -0500 |
| commit | 5459f9abe24c810e09d012519788747e97b3cdd7 (patch) | |
| tree | 80ce0edcee37c71ab8373ef8ed689b6f0aa202ec /arch/arm/boot/dts/socfpga.dtsi | |
| parent | 88c8e4c2648c9daa18430a47e746a669254f00e5 (diff) | |
ARM: socfpga: dts: Add a clock node for sdmmc CIU
The CIU(Card Interface Unit) get its clock from the sdmmc_clk_divided clock
which is used to clock the card. The sdmmc_clk_divided clock is the sdmmc_clk
passed through a fixed divider of 4. This patch adds the sdmmc_clk_divided
node and makes the sdmmc_clk it's parent.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v2: renamed ciu_clk to sdmmc_clk_divided
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index d9176e606173..be4beda11d3d 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -451,6 +451,14 @@ clk-phase = <0 135>; }; + sdmmc_clk_divided: sdmmc_clk_divided { + #clock-cells = <0>; + compatible = "altr,socfpga-gate-clk"; + clocks = <&sdmmc_clk>; + clk-gate = <0xa0 8>; + fixed-divider = <4>; + }; + nand_x_clk: nand_x_clk { #clock-cells = <0>; compatible = "altr,socfpga-gate-clk"; @@ -635,7 +643,7 @@ fifo-depth = <0x400>; #address-cells = <1>; #size-cells = <0>; - clocks = <&l4_mp_clk>, <&sdmmc_clk>; + clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>; clock-names = "biu", "ciu"; }; |