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authorThor Thayer <tthayer@opensource.altera.com>2016-03-31 18:48:07 +0000
committerDinh Nguyen <dinguyen@kernel.org>2016-04-11 14:03:41 -0500
commita44a77115f76a7dd7de4396a7ba159eed1d8be21 (patch)
tree25c01efb2bfb391cdc4ae69d311f05d41e79628d /arch/arm/boot/dts/socfpga_arria10.dtsi
parent64ded09d293932621aad94dddf6d14eb0690246a (diff)
ARM: dts: socfpga: Add Altera Arria10 OCRAM EDAC devicetree entry
Add the device tree entries needed to support the Altera On-Chip RAM EDAC on the Arria10 chip. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga_arria10.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 04da5eac8376..4eec2c7f2167 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -616,6 +616,11 @@
compatible = "altr,socfpga-a10-l2-ecc";
reg = <0xffd06010 0x4>;
};
+
+ ocram-ecc@ff8c3000 {
+ compatible = "altr,socfpga-a10-ocram-ecc";
+ reg = <0xff8c3000 0x400>;
+ };
};
rst: rstmgr@ffd05000 {