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authorGraham Moore <grmoore@opensource.altera.com>2015-07-07 09:58:36 -0500
committerDinh Nguyen <dinguyen@kernel.org>2017-01-05 06:12:47 -0600
commitf549af06e9b64a47b5ad6a45701d1b39330ddb48 (patch)
tree6f20fb08af9a3cad9dd5ceb08baecceac11c1dc4 /arch/arm/boot/dts/socfpga_arria10.dtsi
parentf8a892815fee8766518c64bcbc95557d16410ba2 (diff)
ARM: dts: socfpga: Add NAND device tree for Arria10
Add socfpga_arria10_socdk_nand.dts board file for supporting NAND. Signed-off-by: Graham Moore <grmoore@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v2: move nand dts node to socfpga_arria10.dtsi
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga_arria10.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 3ceb4e496517..1139d3b212a2 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -614,6 +614,19 @@
status = "disabled";
};
+ nand: nand@ffb90000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand";
+ reg = <0xffb90000 0x72000>,
+ <0xffb80000 0x10000>;
+ reg-names = "nand_data", "denali_reg";
+ interrupts = <0 99 4>;
+ dma-mask = <0xffffffff>;
+ clocks = <&nand_clk>;
+ status = "disabled";
+ };
+
ocram: sram@ffe00000 {
compatible = "mmio-sram";
reg = <0xffe00000 0x40000>;