diff options
| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-06-02 21:31:00 -0500 |
|---|---|---|
| committer | Kevin Hilman <khilman@linaro.org> | 2015-06-10 15:45:12 -0700 |
| commit | 112cadfd4365b1949c7f13a2616f6b99990f5fd5 (patch) | |
| tree | ace36b02b457a3068586041e860a0e7f7e3316a8 /arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | |
| parent | da8d2b5d92b199e9897f5fa8c4a78bf66e76f827 (diff) | |
ARM: socfpga: dts: enable ethernet for Arria10 devkit
Update the arria10 gmac nodes with all the necessary properties for ethernet
to function on the Arria10 devkit.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10_socdk.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi index 347ca4ef58f8..94a0709b2fe6 100644 --- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi @@ -41,6 +41,34 @@ }; }; +&gmac0 { + phy-mode = "rgmii"; + phy-addr = <0xffffffff>; /* probe for phy addr */ + + /* + * These skews assume the user's FPGA design is adding 600ps of delay + * for TX_CLK on Arria 10. + * + * All skews are offset since hardware skew values for the ksz9031 + * range from a negative skew to a positive skew. + * See the micrel-ksz90x1.txt Documentation file for details. + */ + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + rxd0-skew-ps = <420>; /* 0ps */ + rxd1-skew-ps = <420>; /* 0ps */ + rxd2-skew-ps = <420>; /* 0ps */ + rxd3-skew-ps = <420>; /* 0ps */ + txen-skew-ps = <0>; /* -420ps */ + txc-skew-ps = <1860>; /* 960ps */ + rxdv-skew-ps = <420>; /* 0ps */ + rxc-skew-ps = <1680>; /* 780ps */ + max-frame-size = <3800>; + status = "okay"; +}; + &uart1 { status = "okay"; }; |