diff options
| author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2017-02-10 11:21:33 -0600 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2017-03-13 22:49:01 -0500 |
| commit | b59902805f5224b6f27a958cf2cbe9bf6b9b0004 (patch) | |
| tree | 46329e5909bc6c6f8315897ea1a2750948330597 /arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | |
| parent | 34869353774bc6de05291fc6ad50d7f471fa3cd8 (diff) | |
ARM: dts: socfpga: sodia: enable qspi
Enable the qspi controller on sodia board and add the flash chip
(n25q512a).
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_cyclone5_sodia.dts')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts index 0e2c68bb021f..8860dd2e242c 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_sodia.dts @@ -121,3 +121,24 @@ &usb1 { status = "okay"; }; + +&qspi { + status = "okay"; + + flash0: n25q512a@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q512a"; + reg = <0>; + spi-max-frequency = <100000000>; + + m25p,fast-read; + cdns,page-size = <256>; + cdns,block-size = <16>; + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + }; +}; |