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authorGabriel Fernandez <gabriel.fernandez@st.com>2016-08-29 14:27:00 +0200
committerPatrice Chotard <patrice.chotard@st.com>2016-09-16 09:42:13 +0200
commit3a74152ce62e7ec1b8a5604b10e40d2a66d8f43b (patch)
tree6220d2bd2e0357f702969521cbcf54cda599fe9d /arch/arm/boot/dts/stih410.dtsi
parenta0bfc7d068f685565f15f5f1e113eb293b68980b (diff)
ARM: dts: STiH410: clock configuration to address 720p and 1080p
It is necessary to properly configure these clocks in order to address 720p and 1080p HDMI resolution. Signed-off-by: Vincent Abriou <vincent.abriou@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Acked-by: Peter Griffin <peter.griffin@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/stih410.dtsi')
-rw-r--r--arch/arm/boot/dts/stih410.dtsi16
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi
index 6850f5861dc3..2d231300bf27 100644
--- a/arch/arm/boot/dts/stih410.dtsi
+++ b/arch/arm/boot/dts/stih410.dtsi
@@ -103,7 +103,10 @@
#size-cells = <1>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
- <&clk_s_d2_quadfs 0>,
+ <&clk_s_d2_quadfs 1>,
+ <&clk_s_c0_pll1 0>,
+ <&clk_s_c0_flexgen CLK_COMPO_DVP>,
+ <&clk_s_c0_flexgen CLK_MAIN_DISP>,
<&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
<&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
<&clk_s_d2_flexgen CLK_PIX_GDP1>,
@@ -113,14 +116,21 @@
assigned-clock-parents = <0>,
<0>,
+ <0>,
+ <&clk_s_c0_pll1 0>,
+ <&clk_s_c0_pll1 0>,
<&clk_s_d2_quadfs 0>,
- <&clk_s_d2_quadfs 0>,
+ <&clk_s_d2_quadfs 1>,
<&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 0>;
- assigned-clock-rates = <297000000>, <297000000>;
+ assigned-clock-rates = <297000000>,
+ <108000000>,
+ <0>,
+ <400000000>,
+ <400000000>;
ranges;