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authorPatrice Chotard <patrice.chotard@st.com>2018-02-27 10:03:57 +0100
committerAlexandre Torgue <alexandre.torgue@st.com>2018-02-27 10:04:27 +0100
commitc1947fd27b47037a45e241fd462772cbc7345fc0 (patch)
tree31fc6d6dc8c146b05b340e3a62962a0ee9bbc80a /arch/arm/boot/dts/stm32f746.dtsi
parentbcc4f4e118e46ba86a8ddd448d318c5bd8fada5d (diff)
ARM: dts: stm32: Add SDIO controller for stm32f746
stm32f746 embeds ARM_PL180 sdio IP, adds SDIO controller nodes to allow MMC support. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32f746.dtsi')
-rw-r--r--arch/arm/boot/dts/stm32f746.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 8fe96d6d0ca2..07c29658696c 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -428,6 +428,28 @@
status = "disabled";
};
+ sdio2: sdio2@40011c00 {
+ compatible = "arm,pl180", "arm,primecell";
+ arm,primecell-periphid = <0x00880180>;
+ reg = <0x40011c00 0x400>;
+ clocks = <&rcc 0 167>;
+ clock-names = "apb_pclk";
+ interrupts = <103>;
+ max-frequency = <48000000>;
+ status = "disabled";
+ };
+
+ sdio1: sdio1@40012c00 {
+ compatible = "arm,pl180", "arm,primecell";
+ arm,primecell-periphid = <0x00880180>;
+ reg = <0x40012c00 0x400>;
+ clocks = <&rcc 0 STM32F7_APB2_CLOCK(SDMMC1)>;
+ clock-names = "apb_pclk";
+ interrupts = <49>;
+ max-frequency = <48000000>;
+ status = "disabled";
+ };
+
syscfg: system-config@40013800 {
compatible = "syscon";
reg = <0x40013800 0x400>;