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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-03 16:07:36 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-10 19:13:43 +0200
commitb74aec1a5f6cb559bc9fa38190afa59ddf746dda (patch)
tree4bf604385873e62fa7165be59625ca47cdda4d14 /arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
parentdad0855dd3ea84ca16feada7c0d384de6de0a199 (diff)
ARM: sun4i: dt: Fix A10 SoC bus base address
There was a typo in the base address used for the soc node in the A10 device tree. Fix it with the proper base address. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun4i-a10-mini-xplus.dts')
-rw-r--r--arch/arm/boot/dts/sun4i-a10-mini-xplus.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
index 078ed7f618d7..0c1447c68059 100644
--- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
+++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
@@ -22,7 +22,7 @@
bootargs = "earlyprintk console=ttyS0,115200";
};
- soc@01c20000 {
+ soc@01c00000 {
uart0: serial@01c28000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;