diff options
| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-10-20 09:01:41 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-11-22 15:32:10 +0100 |
| commit | 7c432442c883651f8c278da40c058f8bac1c42a1 (patch) | |
| tree | 7355e9d7f075147613c3d277fadf126622a0d174 /arch/arm/boot/dts/sun5i-gr8.dtsi | |
| parent | aade6b90d5846a08254f212de6c5f7757cdf4f6c (diff) | |
ARM: gr8: Add UART2 pins
The UART2 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-gr8.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun5i-gr8.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-gr8.dtsi b/arch/arm/boot/dts/sun5i-gr8.dtsi index c68439b27ef9..48e5eea9c3ab 100644 --- a/arch/arm/boot/dts/sun5i-gr8.dtsi +++ b/arch/arm/boot/dts/sun5i-gr8.dtsi @@ -881,6 +881,20 @@ allwinner,drive = <SUN4I_PINCTRL_10_MA>; allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + + uart2_pins_a: uart2@1 { + allwinner,pins = "PD2", "PD3"; + allwinner,function = "uart2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + uart2_cts_rts_pins_a: uart2-cts-rts@0 { + allwinner,pins = "PD4", "PD5"; + allwinner,function = "uart2"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; }; pwm: pwm@01c20e00 { |