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authorChen-Yu Tsai <wens@csie.org>2017-06-06 13:59:29 +0800
committerChen-Yu Tsai <wens@csie.org>2017-08-05 22:06:57 +0800
commit626c0a0ee921a3ea001e4b4f35db89186649f822 (patch)
tree06005a7115d7c41205fe96df1f43bf3acf28b9e3 /arch/arm/boot/dts/sun6i-a31.dtsi
parentc50f9fb6c535edf4731eecb53d91ebc297e82e5b (diff)
ARM: dts: sun6i: a31: Use new sun6i-a31-r-intc compatible for NMI/R_INTC
We introduced a new compatible for the NMI or R_INTC interrupt controller. This new compatible has the register region aligned to the boundary listed in the SoC's memory map. This patch converts the NMI/R_INTC node to using the new compatible, and fixes up the register region and device node name. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun6i-a31.dtsi')
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index aebc3f9dc7b6..b147cb0dc14b 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -1155,11 +1155,11 @@
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
};
- nmi_intc: interrupt-controller@01f00c0c {
- compatible = "allwinner,sun6i-a31-sc-nmi";
+ nmi_intc: interrupt-controller@1f00c00 {
+ compatible = "allwinner,sun6i-a31-r-intc";
interrupt-controller;
#interrupt-cells = <2>;
- reg = <0x01f00c0c 0x38>;
+ reg = <0x01f00c00 0x400>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};