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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2015-03-10 19:59:12 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-04-27 08:20:27 +0200
commitfcd601387d70db31ac5e0a17ca584f088821b459 (patch)
treec9098647fc1fdbe28d83c0b226c05824933e6fb1 /arch/arm/boot/dts/sun6i-a31.dtsi
parent6d11c8e2b3aa0993a3cc6e65dc942dd348db5882 (diff)
ARM: dts: sun6i: add p2wi controller node to dtsi
The p2wi controller has only one possible pinmux setting. Use it by default in the dtsi, instead of having to set it in each board's dts. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> [wens@csie.org: reformat commit title; rename p2wi pins and use as default] Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun6i-a31.dtsi')
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index fa2f403ccf28..92abea20b946 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -973,6 +973,27 @@
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+
+ p2wi_pins: p2wi {
+ allwinner,pins = "PL0", "PL1";
+ allwinner,function = "s_p2wi";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+ };
+
+ p2wi: i2c@01f03400 {
+ compatible = "allwinner,sun6i-a31-p2wi";
+ reg = <0x01f03400 0x400>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&apb0_gates 3>;
+ clock-frequency = <100000>;
+ resets = <&apb0_rst 3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&p2wi_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
};
};
};