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authorMarcus Cooper <codekipper@gmail.com>2016-03-21 21:01:02 +0100
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-03-27 16:15:04 +0200
commit90b7a48935421d4605a181ee49de03224b93c205 (patch)
tree28b66baa962488d654e994d266864f2017aa8473 /arch/arm/boot/dts/sun7i-a20.dtsi
parent1010cd549974dcee5ee172bd878f989c521c409f (diff)
ARM: dts: sun7i: Add the SPDIF clk to the A20
Add the SPDIF clock to the A20 dtsi. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 0c207d00d6c2..108cad4fb1fb 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -476,6 +476,17 @@
clock-output-names = "ir1";
};
+ spdif_clk: clk@01c200c0 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-mod1-clk";
+ reg = <0x01c200c0 0x4>;
+ clocks = <&pll2 SUN4I_A10_PLL2_8X>,
+ <&pll2 SUN4I_A10_PLL2_4X>,
+ <&pll2 SUN4I_A10_PLL2_2X>,
+ <&pll2 SUN4I_A10_PLL2_1X>;
+ clock-output-names = "spdif";
+ };
+
keypad_clk: clk@01c200c4 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";