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authorMaxime Ripard <maxime.ripard@free-electrons.com>2016-10-19 11:15:27 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-11-22 15:34:08 +0100
commitbe7bc6b98781451d9ec55fa9267ac895f060d172 (patch)
treecb2d889feae189d480e335831460ac72b2fbe7e5 /arch/arm/boot/dts/sun7i-a20.dtsi
parent82f2e1884eba4ad04af0a04dc0247cde631d451a (diff)
ARM: sunxi: Add the missing clocks to the pinctrl nodes
The pin controllers also use the two oscillators for debouncing. Add them to the DTs. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20.dtsi')
-rw-r--r--arch/arm/boot/dts/sun7i-a20.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 94cf5a1c7172..f7db067b0de0 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1085,7 +1085,8 @@
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 5>;
+ clocks = <&apb0_gates 5>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;