diff options
| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-10-05 12:49:50 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-10-06 10:41:22 +0200 |
| commit | d177864f4770c1b6ea6b40a5a937ce8f49d969d9 (patch) | |
| tree | 34dc4b7c53401276ff52775f2dd28e28f49d6100 /arch/arm/boot/dts/sun9i-a80.dtsi | |
| parent | 1848f3f44444180926950ce2758c6d7ab36d8381 (diff) | |
ARM: dts: sun9i: Rename pinctrl nodes to avoid warnings
Our pinctrl node names were containing unit-adresses without a reg
property, resulting in a warning. Change the names for our new convention.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun9i-a80.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 190d1f9df2d4..f9cb701f29b0 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -489,12 +489,12 @@ #size-cells = <0>; #gpio-cells = <3>; - i2c3_pins_a: i2c3@0 { + i2c3_pins: i2c3-pins { pins = "PG10", "PG11"; function = "i2c3"; }; - mmc0_pins: mmc0 { + mmc0_pins: mmc0-pins { pins = "PF0", "PF1" ,"PF2", "PF3", "PF4", "PF5"; function = "mmc0"; @@ -502,7 +502,7 @@ bias-pull-up; }; - mmc1_pins: mmc1 { + mmc1_pins: mmc1-pins { pins = "PG0", "PG1" ,"PG2", "PG3", "PG4", "PG5"; function = "mmc1"; @@ -510,7 +510,7 @@ bias-pull-up; }; - mmc2_8bit_pins: mmc2_8bit { + mmc2_8bit_pins: mmc2-8bit-pins { pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", @@ -520,12 +520,12 @@ bias-pull-up; }; - uart0_pins_a: uart0@0 { + uart0_ph_pins: uart0-ph-pins { pins = "PH12", "PH13"; function = "uart0"; }; - uart4_pins_a: uart4@0 { + uart4_pins: uart4-pins { pins = "PG12", "PG13", "PG14", "PG15"; function = "uart4"; }; |