diff options
| author | Ondrej Jirman <megous@megous.com> | 2018-02-06 12:48:58 +0800 |
|---|---|---|
| committer | Chen-Yu Tsai <wens@csie.org> | 2018-04-20 14:39:07 +0800 |
| commit | 4b877d4a35bf9c284b6992fdd9232718e9e921ee (patch) | |
| tree | b9b1c3595ab8858839dcda7ef47530862d99d13c /arch/arm/boot/dts/sunxi-h3-h5.dtsi | |
| parent | 60cc43fc888428bb2f18f08997432d426a243338 (diff) | |
ARM: dts: sunxi: h3/h5: Add r_i2c pinmux node
H3/H5 SoCs contain an I2C controller optionally available
on the PL0 and PL1 pins. This patch adds pinmux configuration
for this controller.
Signed-off-by: Ondrej Jirman <megous@megous.com>
[Icenowy: change commit message, node name and function name]
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 1be1a02d6df2..92b8fa96e737 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -837,6 +837,11 @@ pins = "PL11"; function = "s_cir_rx"; }; + + r_i2c_pins: r-i2c { + pins = "PL0", "PL1"; + function = "s_i2c"; + }; }; }; }; |