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authorVladimir Zapolskiy <vz@mleia.com>2017-12-12 03:26:09 +0300
committerThierry Reding <treding@nvidia.com>2017-12-20 19:57:20 +0100
commitf143bf345d3cbe44128816d56a01088205243e07 (patch)
tree808ed2aa8d1eb24d4cf8a26b171bbd98a35941d7 /arch/arm/boot/dts/tegra20.dtsi
parent4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323 (diff)
ARM: tegra: Add device tree node to describe IRAM on Tegra20
All Tegra20 SoCs contain 256 KiB IRAM, which is used to store resume code and by the video decoder engine. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 914f59166a99..36909df653c3 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -10,6 +10,14 @@
compatible = "nvidia,tegra20";
interrupt-parent = <&lic>;
+ iram@40000000 {
+ compatible = "mmio-sram";
+ reg = <0x40000000 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x40000000 0x40000>;
+ };
+
host1x@50000000 {
compatible = "nvidia,tegra20-host1x", "simple-bus";
reg = <0x50000000 0x00024000>;