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authorStefan Agner <stefan@agner.ch>2014-12-02 18:11:59 +0100
committerShawn Guo <shawn.guo@linaro.org>2015-01-05 20:43:48 +0800
commit0d018d7387bd3c2d25ca7ed1a6b3631c071cd918 (patch)
tree7f8b986c6bc42ffbdc6c9439439f41cd4ef5f2c8 /arch/arm/boot/dts/vfxxx.dtsi
parent7194661924531d02935bc752238202299bb0dcb1 (diff)
ARM: dts: vf610: add system reset controller and syscon-reboot
Add the system reset controller (SRC) module and use syscon-reboot to register a restart handler which restarts the SoC using the SRC SW_RST bit. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/vfxxx.dtsi')
-rw-r--r--arch/arm/boot/dts/vfxxx.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index 712646814cc6..a55e1f9a414d 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -43,6 +43,13 @@
clock-frequency = <32768>;
};
+ reboot: syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&src>;
+ offset = <0x0>;
+ mask = <0x1000>;
+ };
+
soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -318,6 +325,11 @@
clocks = <&clks VF610_CLK_USBC0>;
status = "disabled";
};
+
+ src: src@4006e000 {
+ compatible = "fsl,vf610-src", "syscon";
+ reg = <0x4006e000 0x1000>;
+ };
};
aips1: aips-bus@40080000 {