diff options
| author | Hyongbin Kim <hyongbink@nvidia.com> | 2013-07-11 11:44:49 +0900 |
|---|---|---|
| committer | Gabby Lee <galee@nvidia.com> | 2013-07-11 21:13:31 -0700 |
| commit | 6a24b3182ee126458e490291b42786c25b5e12c3 (patch) | |
| tree | 2a98e98a7e0223d390f506d9d7d03478e627165c /arch/arm/boot/dts | |
| parent | f782f3b283c38c58bdda6f58f3838b398f165bd9 (diff) | |
ARM: Tegra: tegratab-power: apply new model data of max17048
Bug 1304204
Change-Id: I1ee1539714011663b460f3627dd7b45edb0877ce
Signed-off-by: Hyongbin Kim <hyongbink@nvidia.com>
Reviewed-on: http://git-master/r/247543
Reviewed-by: Gabby Lee <galee@nvidia.com>
Tested-by: Gabby Lee <galee@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra114-tegratab-common.dtsi | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/tegra114-tegratab-common.dtsi b/arch/arm/boot/dts/tegra114-tegratab-common.dtsi index e16f11710b25..336a5a161c2e 100644 --- a/arch/arm/boot/dts/tegra114-tegratab-common.dtsi +++ b/arch/arm/boot/dts/tegra114-tegratab-common.dtsi @@ -837,20 +837,20 @@ vreset-disable = <1>; /* not use */ hib-threshold = <48>; /* 9.984%/hr */ hib-active-threshold = <128>; /* 160mV */ - bits = <18>; - rcomp = <57>; - rcomp-seg = <0x0200>; - soccheck-a = <119>; - soccheck-b = <121>; - ocvtest = <55952>; - data-tbl = <0x98 0x80 0xB3 0x50 0xB7 0x90 0xB9 0x00 - 0xBA 0x70 0xBC 0x10 0xBC 0x50 0xBC 0xA0 - 0xBD 0x20 0xBE 0x30 0xBF 0x40 0xC2 0xF0 - 0xC4 0x20 0xC7 0xE0 0xCB 0xF0 0xD0 0x90 - 0x00 0x40 0x06 0x70 0x0E 0x50 0x12 0x00 - 0x18 0xD0 0x33 0x10 0x31 0x40 0x35 0xD0 - 0x18 0xD0 0x19 0x00 0x0B 0xF0 0x0C 0x10 - 0x0D 0x10 0x07 0x90 0x08 0x00 0x08 0x00>; + bits = <19>; + rcomp = <105>; + rcomp-seg = <0x0080>; + soccheck-a = <233>; + soccheck-b = <235>; + ocvtest = <55824>; + data-tbl = <0xAA 0x30 0xB7 0x80 0xB8 0xD0 0xBA 0xC0 + 0xBB 0xC0 0xBC 0x30 0xBC 0xB0 0xBD 0x60 + 0xBE 0x10 0xBF 0x40 0xC0 0x30 0xC3 0x80 + 0xC5 0x00 0xC7 0x60 0xCB 0x50 0xD0 0x10 + 0x03 0x00 0x30 0xC0 0x1C 0x40 0x2C 0x00 + 0x70 0xC0 0x51 0x40 0x43 0xE0 0x43 0xC0 + 0x29 0xC0 0x2F 0xC0 0x17 0xE0 0x12 0xE0 + 0x1C 0x20 0x13 0x80 0x0E 0x00 0x0E 0x00>; }; }; |