diff options
| author | Jinyoung Park <jinyoungp@nvidia.com> | 2013-04-17 23:41:09 +0900 |
|---|---|---|
| committer | Riham Haidar <rhaidar@nvidia.com> | 2013-04-25 14:16:02 -0700 |
| commit | 9edc67ded6874df018b1a9498d9def7e48ff8c42 (patch) | |
| tree | bbf5771a184fc13ac449ef4755ba1122f3c27b52 /arch/arm/boot/dts | |
| parent | 21c89ee78b09829e62dc26c70caef28b5017e4d1 (diff) | |
arm: dts: tegra114: Add max17048_battery DT support for TegraTab
Added max17048 device tree and wrapped I2C and platform data for max17048
in #ifndef CONFIG_OF to prevent duplicate registration.
Bug 1240935
Change-Id: I920d6dc30522f296083a3a79d66884a5869686c4
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/220236
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra114-tegratab-common.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra114-tegratab-common.dtsi b/arch/arm/boot/dts/tegra114-tegratab-common.dtsi index bf751d42307a..5bc18d1a53c7 100644 --- a/arch/arm/boot/dts/tegra114-tegratab-common.dtsi +++ b/arch/arm/boot/dts/tegra114-tegratab-common.dtsi @@ -734,6 +734,33 @@ /* GEN1 */ i2c@7000c000 { status = "okay"; + + max17048@36 { + compatible = "maxim,max17048"; + reg = <0x36>; + alert-threshold = <0>; + one-percent-alerts = <1>; + valert-max = <4240>; + valert-min = <3400>; + vreset-threshold = <2400>; + vreset-disable = <0>; + hib-threshold = <48>; /* 9.984%/hr */ + hib-active-threshold = <128>; /* 160mV */ + bits = <19>; + rcomp = <102>; + rcomp-seg = <0x0080>; + soccheck-a = <237>; + soccheck-b = <239>; + ocvtest = <55952>; + data-tbl = <0x98 0x60 0xB0 0xC0 0xB7 0xB0 0xBA 0x10 + 0xBB 0xE0 0xBC 0x10 0xBC 0xC0 0xBD 0xF0 + 0xBF 0x00 0xC0 0x10 0xC1 0xF0 0xC4 0x00 + 0xC6 0x70 0xC8 0xE0 0xCA 0x80 0xD0 0x90 + 0x00 0x80 0x06 0xA0 0x21 0x40 0x22 0x80 + 0x49 0x90 0x6C 0x80 0x45 0xA0 0x2D 0xE0 + 0x2D 0xC0 0x17 0x80 0x1A 0x00 0x18 0xA0 + 0x18 0x20 0x15 0x40 0x0E 0xA0 0x0E 0xA0>; + }; }; /* GEN2 */ |