diff options
| author | Jon Mason <jon.mason@broadcom.com> | 2017-03-02 19:21:32 -0500 |
|---|---|---|
| committer | Sasha Levin <alexander.levin@verizon.com> | 2017-07-31 13:37:49 -0400 |
| commit | abb744c6eb5813d677c599e2f30cb653e16eb188 (patch) | |
| tree | c8e097cccc051006f1e1cd7a1bb12c59cfcb4981 /arch/arm/boot | |
| parent | 28b6e5ed9b7906483a71437dbcc6312df518940e (diff) | |
ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags
[ Upstream commit 0c2bf9f95983fe30aa2f6463cb761cd42c2d521a ]
GIC_PPI flags were misconfigured for the timers, resulting in errors
like:
[ 0.000000] GIC: PPI11 is secure or misconfigured
Changing them to being edge triggered corrects the issue
Suggested-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Jon Mason <jon.mason@broadcom.com>
Fixes: d27509f1 ("ARM: BCM5301X: add dts files for BCM4708 SoC")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/bcm5301x.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index 78aec6270c2f..90fbda066122 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -54,14 +54,14 @@ timer@0200 { compatible = "arm,cortex-a9-global-timer"; reg = <0x0200 0x100>; - interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; clocks = <&clk_periph>; }; local-timer@0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x0600 0x100>; - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; clocks = <&clk_periph>; }; |