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authorAdam Ford <aford173@gmail.com>2016-01-11 22:57:58 -0600
committerTony Lindgren <tony@atomide.com>2016-02-12 14:25:53 -0800
commit40d5cb207e69718ef25f4463c53a1332d7663ce8 (patch)
tree010b72cdec1c98ddb7bf478b973514497c623f21 /arch/arm/boot
parent59d2c40c45dfb89686940480eb9efb05e7556fe5 (diff)
ARM: dts: LogicPD Torpedo: Add SPI EEPROM
The devkit has an AT25 EEPROM on MCSPI1. Enable this with default parameters. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts14
-rw-r--r--arch/arm/boot/dts/logicpd-torpedo-som.dtsi14
2 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
index f926eaa990d6..703ced2adcca 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
+++ b/arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
@@ -341,6 +341,20 @@
};
};
+&mcspi1 {
+ at25@0 {
+ compatible = "atmel,at25";
+ reg = <0>;
+ spi-max-frequency = <5000000>;
+ spi-cpha;
+ spi-cpol;
+
+ pagesize = <64>;
+ size = <32768>;
+ address-width = <16>;
+ };
+};
+
&isp {
pinctrl-names = "default";
pinctrl-0 = <&isp_pins>;
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 2e4fe3f182c2..8b157bedf570 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -179,6 +179,15 @@
OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
>;
};
+ mcspi1_pins: pinmux_mcspi1_pins {
+ pinctrl-single,pins = <
+ OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
+ OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
+ OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
+ OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
+ >;
+ };
+
};
&uart2 {
@@ -187,6 +196,11 @@
pinctrl-0 = <&uart2_pins>;
};
+&mcspi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcspi1_pins>;
+};
+
&omap3_pmx_core2 {
mmc3_core2_pins: pinmux_mmc3_core2_pins {
pinctrl-single,pins = <