diff options
| author | Arve Hjønnevåg <arve@android.com> | 2012-04-02 17:20:32 -0700 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2014-06-03 22:57:00 -0500 |
| commit | 808431bdc58308ef1044262d8bcd12939bdd0bad (patch) | |
| tree | 2f63d857d467fc66cb95bdd12376af7d574ab6d0 /arch/arm/include | |
| parent | 10fe8d3bf652aaacccb2a11371468af0b315f986 (diff) | |
ARM: etm: Add sysfs entry to enable timestamps if supported
Change-Id: Iff964ba2f6236ed81863e02ec7b3ec9fbc48044a
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/hardware/coresight.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/coresight.h b/arch/arm/include/asm/hardware/coresight.h index 0fad8f8aed7d..42059d36f3aa 100644 --- a/arch/arm/include/asm/hardware/coresight.h +++ b/arch/arm/include/asm/hardware/coresight.h @@ -18,10 +18,12 @@ #define TRACER_RUNNING_BIT 1 #define TRACER_CYCLE_ACC_BIT 2 #define TRACER_TRACE_DATA_BIT 3 +#define TRACER_TIMESTAMP_BIT 4 #define TRACER_ACCESSED BIT(TRACER_ACCESSED_BIT) #define TRACER_RUNNING BIT(TRACER_RUNNING_BIT) #define TRACER_CYCLE_ACC BIT(TRACER_CYCLE_ACC_BIT) #define TRACER_TRACE_DATA BIT(TRACER_TRACE_DATA_BIT) +#define TRACER_TIMESTAMP BIT(TRACER_TIMESTAMP_BIT) #define TRACER_TIMEOUT 10000 @@ -57,6 +59,7 @@ #define ETMCTRL_DATA_DO_BOTH (ETMCTRL_DATA_DO_DATA | ETMCTRL_DATA_DO_ADDR) #define ETMCTRL_BRANCH_OUTPUT (1 << 8) #define ETMCTRL_CYCLEACCURATE (1 << 12) +#define ETMCTRL_TIMESTAMP_EN (1 << 28) /* ETM configuration code register */ #define ETMR_CONFCODE (0x04) @@ -129,8 +132,12 @@ #define ETMR_ID 0x1e4 #define ETMIDR_VERSION(x) (((x) >> 4) & 0xff) +#define ETMIDR_VERSION_3_1 0x21 #define ETMIDR_VERSION_PFT_1_0 0x30 +#define ETMR_CCE 0x1e8 +#define ETMCCER_TIMESTAMPING_IMPLEMENTED BIT(22) + #define ETMR_TRACEIDR 0x200 /* ETM management registers, "ETM Architecture", 3.5.24 */ |