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authorStefan Agner <stefan@agner.ch>2014-09-19 23:04:28 +0200
committerStefan Agner <stefan.agner@toradex.com>2015-08-04 17:51:27 +0200
commit66e003c1ad2acdaa7d42e1113add7d44479392ab (patch)
treebe2627229a413e590318abac6c06e838aca7371c /arch/arm/lib
parent212f7de6697c78da2624a6e68855b486ad10ffd4 (diff)
ARM: imx: clk-gate2: allow custom gate configuration
The 2-bit gates found i.MX and Vybrid SoC support different clock configuration: 0b00: clk disabled 0b01: clk enabled in RUN mode but disabled in WAIT and STOP mode 0b10: clk enabled in RUN, WAIT and STOP mode (only Vybrid) 0b11: clk enabled in RUN and WAIT mode For some clocks, we might want to configure different behaviour, e.g. a memory clock should be on even in STOP mode. Add a new function imx_clk_gate2_cgr which allow to configure specific gate values through the cgr_val parameter.
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