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authorShawn Guo <shawn.guo@linaro.org>2013-08-13 14:59:43 +0800
committerShawn Guo <shawn.guo@linaro.org>2013-10-21 09:13:12 +0800
commitf1c6f314727c7595e249c7da3933ba2bc6219e58 (patch)
tree8e2550fbc365162f7914cb4410118207118005c7 /arch/arm/mach-imx/common.h
parent3f75978b3742157853618c5c6dd4a5f49aa950b1 (diff)
ARM: imx: add a common function to initialize revision from anatop
The patch creates a common function imx_init_revision_from_anatop() by merging imx6q_init_revision() and imx_anatop_get_digprog(), so that any SoC that encodes revision info in anatop can use it to initialize revision. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/common.h')
-rw-r--r--arch/arm/mach-imx/common.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index cac12870efb3..d0191152807d 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -78,6 +78,7 @@ extern void imx_set_aips(void __iomem *);
extern int mxc_device_init(void);
void imx_set_soc_revision(unsigned int rev);
unsigned int imx_get_soc_revision(void);
+void imx_init_revision_from_anatop(void);
enum mxc_cpu_pwr_mode {
WAIT_CLOCKED, /* wfi only */
@@ -134,7 +135,6 @@ extern void imx_gpc_restore_all(void);
extern void imx_anatop_init(void);
extern void imx_anatop_pre_suspend(void);
extern void imx_anatop_post_resume(void);
-extern u32 imx_anatop_get_digprog(void);
extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
extern void imx6q_set_chicken_bit(void);