MLK-12262-4 ARM: imx: fix low power idle issue on i.MX7D TO1.1

For low power idle with ARM power gated, per hardware requirement,
there must be no interrupt coming during the power down
process of ARM core, so RBC counter is enabled to hold interrupts
and GIC must be disabled at the moment;

The hardware design team recommends ~240us is required during ARM
core power down, so we update the RBC counter value to 8(~240us);

Update GPC SCU and CPU power up/down timing according to design
team's recommendation.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index a6b33e90717c..ab12c6c8dd10 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -154,6 +154,7 @@ static inline void imx_gpcv2_add_m4_wake_up_irq(u32 hwirq, bool enable) {}
 void __init imx_gpcv2_check_dt(void);
 void imx_gpcv2_set_lpm_mode(enum mxc_cpu_pwr_mode mode);
 void imx_gpcv2_set_cpu_power_gate_in_idle(bool pdn);
+void imx_gpcv2_enable_rbc(bool enable);
 unsigned long save_ttbr1(void);
 void restore_ttbr1(unsigned long ttbr1);
 void imx_gpc_mask_all(void);