diff options
author | Anson Huang <b20788@freescale.com> | 2014-09-25 11:05:01 +0800 |
---|---|---|
committer | Anson Huang <b20788@freescale.com> | 2014-10-13 11:16:18 +0800 |
commit | 6dfdc55be2fc987be3e57d8e69d73d2726d750db (patch) | |
tree | 6fbec696a7cf02176b88a33d912b0cd004123f8b /arch/arm/mach-imx/pm-imx6.c | |
parent | c0ebad128792a876f8c37a8572f46ab4ee82c14e (diff) |
MLK-9634-1 arm: imx: remove romcp workaround for i.mx6sx TO1.2
i.MX6SX TO1.2 ROM has add ocram_s space support for ARM resume,
so no need to enable ROMCP to workaround it for TO1.2.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6.c')
-rw-r--r-- | arch/arm/mach-imx/pm-imx6.c | 56 |
1 files changed, 25 insertions, 31 deletions
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c index f3675cccbb62..25e66bbef55a 100644 --- a/arch/arm/mach-imx/pm-imx6.c +++ b/arch/arm/mach-imx/pm-imx6.c @@ -344,22 +344,12 @@ static int imx6_pm_enter(suspend_state_t state) imx_gpc_pre_suspend(true); imx_anatop_pre_suspend(); imx_set_cpu_jump(0, v7_cpu_resume); - /* Enable ROM patch for i.MX6SX */ - if (cpu_is_imx6sx()) - regmap_update_bits(romcp, ROMC_ROMPATCHCNTL, - BM_ROMPATCHCNTL_DIS, ~BM_ROMPATCHCNTL_DIS); - imx6_save_cpu_arch_regs(); /* Zzz ... */ cpu_suspend(0, imx6_suspend_finish); imx6_restore_cpu_arch_regs(); - - /* Disable ROM patch for i.MX6SX */ - if (cpu_is_imx6sx()) - regmap_update_bits(romcp, ROMC_ROMPATCHCNTL, - BM_ROMPATCHCNTL_DIS, BM_ROMPATCHCNTL_DIS); if (!cpu_is_imx6sl() && !cpu_is_imx6sx()) imx_smp_prepare(); imx_anatop_post_resume(); @@ -541,27 +531,31 @@ Please ensure device tree has an entry fsl,lpm-sram\n"); cpu_type = MXC_CPU_IMX6SL; else { cpu_type = MXC_CPU_IMX6SX; - /* - * As there is a 16K OCRAM(start from 0x8f8000) - * dedicated for low power function on i.MX6SX, - * but ROM did NOT do the ocram address change - * accordingly, so we need to add a data patch - * to workaround this issue, otherwise, system - * will fail to resume from DSM mode. - */ - romcp = syscon_regmap_lookup_by_compatible("fsl,imx6sx-romcp"); - if (IS_ERR(romcp)) { - pr_err("failed to find fsl,imx6sx-romcp regmap\n"); - return; + if (imx_get_soc_revision() < IMX_CHIP_REVISION_1_2) { + /* + * As there is a 16K OCRAM(start from 0x8f8000) + * dedicated for low power function on i.MX6SX, + * but ROM did NOT do the ocram address change + * accordingly, so we need to add a data patch + * to workaround this issue, otherwise, system + * will fail to resume from DSM mode. TO1.2 fixes + * this issue. + */ + romcp = syscon_regmap_lookup_by_compatible( + "fsl,imx6sx-romcp"); + if (IS_ERR(romcp)) { + pr_err("failed to find fsl,imx6sx-romcp regmap\n"); + return; + } + regmap_write(romcp, ROMC_ROMPATCH0D, iram_paddr); + regmap_update_bits(romcp, ROMC_ROMPATCHCNTL, + BM_ROMPATCHCNTL_0D, BM_ROMPATCHCNTL_0D); + regmap_update_bits(romcp, ROMC_ROMPATCHENL, + BM_ROMPATCHENL_0D, BM_ROMPATCHENL_0D); + regmap_write(romcp, ROMC_ROMPATCH0A, + ROM_ADDR_FOR_INTERNAL_RAM_BASE); + regmap_update_bits(romcp, ROMC_ROMPATCHCNTL, + BM_ROMPATCHCNTL_DIS, ~BM_ROMPATCHCNTL_DIS); } - regmap_write(romcp, ROMC_ROMPATCH0D, iram_paddr); - regmap_update_bits(romcp, ROMC_ROMPATCHCNTL, - BM_ROMPATCHCNTL_DIS, BM_ROMPATCHCNTL_DIS); - regmap_update_bits(romcp, ROMC_ROMPATCHCNTL, - BM_ROMPATCHCNTL_0D, BM_ROMPATCHCNTL_0D); - regmap_update_bits(romcp, ROMC_ROMPATCHENL, - BM_ROMPATCHENL_0D, BM_ROMPATCHENL_0D); - regmap_write(romcp, ROMC_ROMPATCH0A, - ROM_ADDR_FOR_INTERNAL_RAM_BASE); } } |