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authorAnson Huang <Anson.Huang@freescale.com>2015-12-16 21:54:50 +0800
committerLeonard Crestez <leonard.crestez@nxp.com>2018-08-24 12:41:33 +0300
commitcf4503d18b50123e9ac32ab2e21a279ed04606eb (patch)
tree50c4bc80e0266eba1d430e2836cea5aab41267e0 /arch/arm/mach-imx/pm-imx7.c
parent46ecab49c7cca82949ee5b495a68b91af42e5709 (diff)
MLK-12025 ARM: imx: M4 should be in RUN mode when resume from DSM
On i.MX7D, only when M4 enters STOP mode, system is able to enter DSM mode where M4 power will be gated off. This is done by checking a variable which records M4's power mode. However, when system resume from DSM, M4 is re-enabled to RUN mode by A7, but the variable is NOT updated accordingly, so next time system suspend, even M4 is NOT in STOP mode, system can enter DSM mode, which is unexpected and would cause bus-freq use count mismatch. Fix this issue by reset M4 power mode to RUN mode when resume from DSM. Signed-off-by: Anson Huang <Anson.Huang@freescale.com> (cherry picked from commit d22127a8f395edaf719a5bf4874cf22c5bdc8661) Signed-off-by: Teo Hall <teo.hall@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx7.c')
-rw-r--r--arch/arm/mach-imx/pm-imx7.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/pm-imx7.c b/arch/arm/mach-imx/pm-imx7.c
index 0e9e920ced7d..f832b1e0b3e5 100644
--- a/arch/arm/mach-imx/pm-imx7.c
+++ b/arch/arm/mach-imx/pm-imx7.c
@@ -754,6 +754,8 @@ static int imx7_pm_enter(suspend_state_t state)
pm_info->src_base.vbase + M4RCR);
/* offset high bus count for m4 image */
request_bus_freq(BUS_FREQ_HIGH);
+ /* restore M4 to run mode */
+ imx_mu_set_m4_run_mode();
/* gpc wakeup */
imx_mu_lpm_ready(true);
}