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authorBai Ping <ping.bai@nxp.com>2016-02-21 14:53:50 +0800
committerBai Ping <ping.bai@nxp.com>2016-02-21 17:01:35 +0800
commit78916c528cb424b20e87887c85246fceac81f3b4 (patch)
tree55dbf7c9ed4a87112701938cf8d264c551bfaf1d /arch/arm/mach-imx
parent478741a0e1e0ee4358383843d32a52f9763119ca (diff)
MLK-12430 ARM: imx: enable and bypass pll1_bypass clk before changing arm_podf
Before changing the ARM_PODF, the pll1_bypass clock should be enabled and bypassed to make sure the ARM_PODF can be changed. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/busfreq-imx.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/busfreq-imx.c b/arch/arm/mach-imx/busfreq-imx.c
index 0d2568ed3d85..93c87030c975 100644
--- a/arch/arm/mach-imx/busfreq-imx.c
+++ b/arch/arm/mach-imx/busfreq-imx.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011-2015 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2011-2016 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -369,6 +369,12 @@ static void enter_lpm_imx6sl(void)
imx_clk_set_parent(pll1_sw_clk, step_clk);
/*
+ * Need to ensure that PLL1 is bypassed and enabled
+ * before ARM-PODF is set.
+ */
+ clk_set_parent(pll1_bypass_clk, pll1_bypass_src_clk);
+
+ /*
* Ensure that the clock will be
* at original speed.
*/