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authorPatrick McHardy <kaber@trash.net>2011-01-19 23:51:37 +0100
committerPatrick McHardy <kaber@trash.net>2011-01-19 23:51:37 +0100
commit14f0290ba44de6ed435fea24bba26e7868421c66 (patch)
tree449d32e4848007e3edbcab14fa8e09fdc66608ed /arch/arm/mach-msm/include/mach/entry-macro-qgic.S
parentf5c88f56b35599ab9ff2d3398e0153e4cd4a4c82 (diff)
parenta5db219f4cf9f67995eabd53b81a1232c82f5852 (diff)
Merge branch 'master' of /repos/git/net-next-2.6
Diffstat (limited to 'arch/arm/mach-msm/include/mach/entry-macro-qgic.S')
-rw-r--r--arch/arm/mach-msm/include/mach/entry-macro-qgic.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
index 4dc99aa65d07..12467157afb9 100644
--- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
+++ b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S
@@ -26,7 +26,7 @@
* The interrupt numbering scheme is defined in the
* interrupt controller spec. To wit:
*
- * Migrated the code from ARM MP port to be more consistant
+ * Migrated the code from ARM MP port to be more consistent
* with interrupt processing , the following still holds true
* however, all interrupts are treated the same regardless of
* if they are local IPI or PPI